1. Field of the Invention
This invention relates to a circuit for the production of read-out pulses for a MI.sub.1 I.sub.2 S storage matrix which is constructed with MI.sub.1 I.sub.2 S transistors.
2. Description of the Prior Art
MI.sub.1 I.sub.2 S transistors have a double layer gate. Here, the threshold voltage is dependent upon the charge stage of the boundary between the two insulating layers I.sub.1 and I.sub.2. Traps located at this boundary can become charged and discharged by positive and negative gate voltages. Consequently, the MI.sub.1 I.sub.2 S storage transistors possess either a high threshold voltage or a low threshold voltage which can be employed for the storage of digital information. Read-out is effected by connecting a gate voltage having an amplitude which lies between the two values of the threshold voltages.
In the case of repetitive write-in of information, however, the disadvantage arises that the threshold voltages of the transistors become shifted. If, however, the amplitude of the read-out pulses remains constant, it is possible to differentiate between the threshold voltages up to the shift with which the transistor possessing the one threshold voltage is conductive whereas the transistor possessing the other is nonconductive. If, however, this condition is not fulfilled, it is no longer possible to read out the information from the transistor as when the read-out voltage is connected the transistor is either always conductive or always nonconductive.